Q.
The truth table for the following logic circuit is
A) $\left| \begin{array}{r}
\begin{matrix}
A & B & Y
\end{matrix} \\
\begin{matrix}
0 & 0 & 0
\end{matrix} \\
\begin{matrix}
0 & 1 & 1
\end{matrix} \\
\begin{matrix}
1 & 0 & 1
\end{matrix} \\
\begin{matrix}
1 & 1 & 0
\end{matrix}
\end{array} \right|$
B) $\left| \begin{array}{r}
\begin{matrix}
A & B & Y
\end{matrix} \\
\begin{matrix}
0 & 0 & 0
\end{matrix} \\
\begin{matrix}
0 & 1 & 1
\end{matrix} \\
\begin{matrix}
1 & 0 & 1
\end{matrix} \\
\begin{matrix}
1 & 1 & 1
\end{matrix}
\end{array} \right|$
C) $\left| \begin{array}{r}
\begin{matrix}
A & B & Y
\end{matrix} \\
\begin{matrix}
0 & 0 & 1
\end{matrix} \\
\begin{matrix}
0 & 1 & 0
\end{matrix} \\
\begin{matrix}
1 & 0 & 1
\end{matrix} \\
\begin{matrix}
1 & 1 & 0
\end{matrix}
\end{array} \right|$
D) $\left| \begin{array}{r}
\begin{matrix}
A & B & Y
\end{matrix} \\
\begin{matrix}
0 & 0 & 1
\end{matrix} \\
\begin{matrix}
0 & 1 & 1
\end{matrix} \\
\begin{matrix}
1 & 0 & 0
\end{matrix} \\
\begin{matrix}
1 & 1 & 1
\end{matrix}
\end{array} \right|$
Explanation
(a) The output gate circuit will be as shown below.
[image:14_image229.jpeg]
Hence, outputs of A, B and C are 1, 1, and 0 respectively.
Reviewed by Dr. Abubacker
Physics Educator & NEET/JEE Specialist
Ph.D. in Physics with 19+ years of teaching experience.